1. Field of the Invention
The present invention relates generally to digital data processing systems and more particularly to a parallel processor employed as an array processor or floating point processor for use in data processing systems.
2. Description of Prior Art
Parallel processors have been employed in data processing systems for some time. Examples of parallel processors are floating point processors, such as those disclosed in the above noted incorporated-by-reference patents. Other examples of parallel processors include what are termed array processors, as for example illustrated in the above-identified incorporated-by-reference patents. Parallel processors are employed when additional speed is required or when special kinds of computations are to be repetitively made where a dedicated piece of hardware is called for.
For example, there seems to have always been a need in computer applications for repetitive calculations to be made on large sets of data. The traditional approach of processing arrays of data with a general purpose computer has a severe disadvantage, because many instructions must be repeatedly fetched and decoded for each element of such an array. One way to improve efficiency is to implement the array processing functions at the hardware or firmware level, rather than the software level. This approach has been recognized by the computer industry and up to the present time, as far as is known, there were three basic approaches to the problem: (1) large, fast general purpose computers; (2) peripheral processing units which require a host computer; and, (3) custom special-purpose hardware.
The large general purpose machines do meet the requirements of array processing applications, but their prices make them usually too expensive for the majority of computer applications. Also, an experienced programmer (or many programmers) may be needed to successfully run such an application, and this can be very costly. Further, considerations such as the system's physical size also increase the cost and complexity of such a system.
Peripheral units provide considerable power at much lower cost, but they also have their disadvantages. Though they are commonly designed to interface with minicomputers, these devices often cost several times as much as the systems to which they are connected. The units often have little software support, and the available software may have been compromised by the necessity of interfacing to a variety of host computers. Another problem with peripheral array processors is that they generally move data by way of the system I/O (input/output) or DMA (direct memory access) bus, which means that they must complete with other system devices for use of these busses. And last but not least is the fact that the user must deal with two different vendors to obtain a complete system, with all the problems and incompatibilities that usually result. The only other solution (up to the present solution provided by the present invention) has been custom hardware, which is expensive to obtain and often lacks versatility because of its dedicated nature.
The foregoing problems and shortcomings of prior art developments have been overcome by the present invention. The present invention relates to a parallel processor (array processor or floating point processor) which integrates its hardware into the system architecture in order to provide an unprecedented price/performance ratio, and preserves compatibility with existing software. The present invention therefore can bring the power of array processing to a far wider range of applications than previously was available.